| 发明名称 |
SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM |
| 摘要 |
According to one embodiment, a semiconductor memory device includes: memory cells; word lines electrically connected to gates of the memory cell; and an interconnect electrically connected to one end of the memory cells. A first potential for applying to a selected memory cell in a read operation is determined based on a potential of the interconnect during sequentially increasing or decreasing a potential of the word line. |
| 申请公布号 |
US2016267999(A1) |
申请公布日期 |
2016.09.15 |
| 申请号 |
US201514847569 |
申请日期 |
2015.09.08 |
| 申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
TAKEYAMA Yoshikazu;Nagai Yuji;Isobe Katsuaki |
| 分类号 |
G11C16/28 |
主分类号 |
G11C16/28 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A semiconductor memory device comprising:
memory cells; word lines electrically connected to gates of the memory cells; and an interconnect electrically connected to one end of the memory cells, wherein a first potential for applying to a selected memory cell in a read operation is determined based on a potential of the interconnect during sequentially increasing or decreasing a potential of the word line. |
| 地址 |
Minato-ku JP |
