| 摘要 |
A common mode logic buffer device includes a current source (112) configured to provide a source current. An input stage includes a first MOS transistor pair (110) configured to generate, from the source current and based upon an input differential voltage, a differential current between two output paths. An output stage includes a second MOS transistor pair (106) configured to generate an output differential voltage based upon an effective impedance provided for the each of the two output paths. An adjustment circuit (104, 108) is configured to adjust, in response to a control signal, the effective impedance of the second MOS transistor pair (106). |
