发明名称 Organic Light Emitting Display
摘要 An organic light emitting display comprises a display panel having a plurality of pixels, a gate drive circuit that drives scan lines and emission lines on the display panel, and a data drive circuit that drives data lines on the display panel, (n−1)th and nth pixels arranged in a row, a transistor array having a driving transistor, a sampling transistor, and a first initial transistor, and a capacitor connected between an initial voltage input terminal and the sampling transistor. A gate electrode of the first initial transistor for initializing the driving transistor of the nth pixel is connected to a scan line in the (n−1)th pixel.
申请公布号 US2016351124(A1) 申请公布日期 2016.12.01
申请号 US201615164704 申请日期 2016.05.25
申请人 LG Display Co., Ltd. 发明人 KIM Daekyu;KIM Jungchul;KANG Heekwang;KWON Junyoung
分类号 G09G3/3241;G09G3/3291;G09G3/3266 主分类号 G09G3/3241
代理机构 代理人
主权项 1. An organic light emitting display comprising: a display panel having a plurality of pixels; a gate drive circuit that drives scan lines and emission lines on the display panel; and a data drive circuit that drives data lines on the display panel, wherein each of the pixels arranged in an nth row (n is a natural number) comprises: an organic light emitting diode having an anode connected to a node C and a cathode connected to a low-level driving voltage input terminal,a driving transistor having a gate electrode connected to a node A, a source electrode connected to a node D, and a drain electrode connected to a node B, the driving transistor controlling a driving current applied to the organic light emitting diode,a first transistor that is connected between a data line and the node D,a second transistor that is connected between the node D and a high-level driving voltage input terminal,a third transistor that is connected to the node A and the node B,a fourth transistor that is connected to the node B and the node C,a fifth transistor that is connected between the node A and an initial voltage input terminal, anda capacitor that is connected between the node A and the initial voltage input terminal.
地址 Seoul KR