发明名称 |
RECONFIGURABLE AND CUSTOMIZABLE GENERAL-PURPOSE CIRCUITS FOR NEURAL NETWORKS |
摘要 |
A reconfigurable neural network circuit is provided. The reconfigurable neural network circuit comprises an electronic synapse array including multiple synapses interconnecting a plurality of digital electronic neurons. Each neuron comprises an integrator that integrates input spikes and generates a signal when the integrated inputs exceed a threshold. The circuit further comprises a control module for reconfiguring the synapse array. The control module comprises a global final state machine that controls timing for operation of the circuit, and a priority encoder that allows spiking neurons to sequentially access the synapse array. |
申请公布号 |
US2016358067(A1) |
申请公布日期 |
2016.12.08 |
申请号 |
US201615243792 |
申请日期 |
2016.08.22 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
Brezzo Bernard V.;Chang Leland;Esser Steven K.;Friedman Daniel J.;Liu Yong;Modha Dharmendra S.;Montoye Robert K.;Rajendran Bipin;Seo Jae-sun;Tierno Jose A. |
分类号 |
G06N3/063;G06N3/04 |
主分类号 |
G06N3/063 |
代理机构 |
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代理人 |
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主权项 |
1. A method for non-linear pattern classification of images, comprising:
in a learning phase:
receiving an input image; andbased on the input image, training a neural network to learn and classify a pattern included in the input image, wherein the neural network comprises a plurality of neurons interconnected via a plurality of synapses; and in a recall phase:
receiving corrupted data; andperforming pattern recognition on the corrupted data, wherein the pattern is recalled if the corrupted data comprises an incomplete version of the pattern. |
地址 |
Armonk NY US |