发明名称 |
ETCH DEPTH DETERMINATION FOR SGT TECHNOLOGY |
摘要 |
A method for determining the depth etch, a method of forming a shielded gate trench (SGT) structure and a semiconductor device wafer are disclosed. A material layer is formed over part of a substrate having a trench. The material fills the trench. A resist mask is placed over a test portion of the layer of material. The resist mask does not cover the trench. The layer of material is isotropically etched. An etch depth may be determined from a characteristic of etching of the material underneath the mask. Such a method may be used for forming SGT structures. The wafer may comprise a layer of material disposed on at least a portion of a surface of semiconductor wafer; a resist mask comprising an angle-shaped test portion disposed over a portion of the layer of material; and a ruler marking on the surface of the substrate proximate the test portion.
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申请公布号 |
US2008233748(A1) |
申请公布日期 |
2008.09.25 |
申请号 |
US20070690546 |
申请日期 |
2007.03.23 |
申请人 |
ALPHA & OMEGA SEMICONDUCTOR, LTD. |
发明人 |
LOU YINGYING;LI TIESHENG;WANG YU;BHALLA ANUP |
分类号 |
C23F1/00;H01L21/302 |
主分类号 |
C23F1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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