| 摘要 |
A technique for improving characteristics of a semiconductor device (DMOSFET) is provided. A semiconductor device is configured so as to include: an n-type source layer (102) disposed on an upper portion of a first surface side of an SiC substrate (106) ; a p body layer (103) which surrounds the source layer and has a channel region; an n - -type drift layer (107) which is in contact with the p body layer (103); a gate electrode (116) which is disposed on an upper portion of the channel region via a gate insulating film; and a first p + layer (109) which is disposed in the p body layer (103), extends to a portion below the n + source layer (102), and serves as a buried semiconductor region having an impurity concentration higher than that of the p body layer (103). In this manner, since the first p + layer (109) is formed in the middle of the p body layer (103), it is possible to reduce the diffusion resistance of the p body layer (103). Thus, it is possible to make a parasitic bipolar transistor harder to turn on. |
