发明名称 CONTROLLING EXECUTION OF INSTRUCTIONS FOR A PROCESSING PIPELINE HAVING FIRST AND SECOND EXECUTION CIRCUITRY
摘要 An apparatus comprises a processing pipeline comprising out-of-order execution circuitry and second execution circuitry. Control circuitry monitors at least one reordering metric indicative of an extent to which instructions are executed out of order by the out-of-order execution circuitry, and controls whether instructions are executed using the out-of-order execution circuitry or the second execution circuitry based on the reordering metric. A speculation metric indicative of a fraction of executed instructions that are flushed due to a mis-speculation can also be used to determine whether to execute instructions on first or second execution circuitry having different performance or energy consumption characteristics.
申请公布号 US2016357554(A1) 申请公布日期 2016.12.08
申请号 US201514731789 申请日期 2015.06.05
申请人 ARM LIMITED 发明人 CAULFIELD Ian Michael;GREENHALGH Peter Richard;CRASKE Simon John;BATLEY Max John;SKILLMAN Allan John;PENTON Antony John
分类号 G06F9/30 主分类号 G06F9/30
代理机构 代理人
主权项 1. An apparatus comprising: a processing pipeline comprising out-of-order execution circuitry to perform out-of-order execution of instructions and second execution circuitry to execute instructions; and control circuitry to monitor at least one reordering metric indicative of an extent to which instructions are executed out of order by the out-of-order execution circuitry and to control whether instructions are executed using the out-of-order execution circuitry or the second execution circuitry based on said at least one reordering metric.
地址 Cambridge GB