发明名称 |
Data storage device compensating for hysteretic response of microactuator |
摘要 |
A data storage device is disclosed comprising a microactuator configured to actuate a head over a disk. A control signal applied to the microactuator is generated based on an input sequence u(k). A Preisach bit map bj is updated based on the input sequence u(k), wherein the Preisach bit map bj corresponds to a Preisach plane modeling a hysteretic response of the microactuator. A current compensation value yi is generated based on an update value generated based on:;∑jh(j)b^j
where hj represents a slice of the Preisach plane and {circumflex over (b)}j is an update bit map based on at least part of the Preisach bit map bj. The current input ui and the current compensation value yi are combined to generate the control signal applied to the microactuator. |
申请公布号 |
US9153283(B1) |
申请公布日期 |
2015.10.06 |
申请号 |
US201414501471 |
申请日期 |
2014.09.30 |
申请人 |
Western Digital Technologies, Inc. |
发明人 |
Xi Wei;Zhang Wenlin |
分类号 |
G11B5/596;G11B20/10;G11B5/09;G11B5/55 |
主分类号 |
G11B5/596 |
代理机构 |
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代理人 |
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主权项 |
1. A data storage device comprising:
a disk; a head; a microactuator configured to actuate the head over the disk; and control circuitry configured to:
generate a control signal applied to the microactuator based on an input sequence u(k);update a Preisach bit map bj based on the input sequence u(k), wherein the Preisach bit map bj corresponds to a Preisach plane modeling a hysteretic response of the microactuator;generate a current compensation value yi based on an update value generated based on:∑jh(j)b^j where hj represents a slice of the Preisach plane and {circumflex over (b)}j is an update bit map based on at least part of the Preisach bit map bj; andcombine a current input ui and the current compensation value yi to generate the control signal applied to the microactuator. |
地址 |
Irvine CA US |