| 摘要 |
A semiconductor memory device is provided to improve yield and reliability of chip by screening a weak cell during a wafer test. A memory cell is connected to a pair of bit lines and a word line. A bit line sense amplifier is enabled by a sense driving voltage to amplify the potential of the bit line pair. A word line enable unit enables the word line in response to an active signal. A sense driving voltage generation unit drives the sense driving voltage after delay as long as sensing margin from the enable time of the word line during a normal mode, and drives the sense driving voltage after delay shorter than the sensing margin during a test mode.
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