发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
摘要 A semiconductor device includes a first oxide insulating layer over a first insulating layer, an oxide semiconductor layer over the first oxide insulating layer, a source electrode layer and a drain electrode layer over the oxide semiconductor layer, a second insulating layer over the source electrode layer and the drain electrode layer, a second oxide insulating layer over the oxide semiconductor layer, a gate insulating layer over the second oxide insulating layer, a gate electrode layer over the gate insulating layer, and a third insulating layer over the second insulating layer, the second oxide insulating layer, the gate insulating layer, and the gate electrode layer. A side surface portion of the second insulating layer is in contact with the second oxide insulating layer. The gate electrode layer includes a first region and a second region. The first region has a width larger than that of the second region.
申请公布号 US2016218219(A1) 申请公布日期 2016.07.28
申请号 US201614995562 申请日期 2016.01.14
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 ASAMI Yoshinobu;OKAZAKI Yutaka;OKAMOTO Satoru;SASAGAWA Shinya
分类号 H01L29/786;H01L21/02;H01L21/4757;H01L21/475;H01L29/66;H01L29/06;H01L29/423 主分类号 H01L29/786
代理机构 代理人
主权项 1. A semiconductor device comprising: a first insulating layer; a first oxide insulating layer over the first insulating layer; an oxide semiconductor layer over the first oxide insulating layer; a source electrode layer and a drain electrode layer over the oxide semiconductor layer; a second insulating layer over the first insulating layer, the source electrode layer, the drain electrode layer, and the oxide semiconductor layer; a second oxide insulating layer over the oxide semiconductor layer; a gate insulating layer over the second oxide insulating layer; a gate electrode layer over the gate insulating layer; and a third insulating layer over the second insulating layer, the second oxide insulating layer, the gate insulating layer, and the gate electrode layer, wherein a side surface portion of the second insulating layer is in contact with the second oxide insulating layer, wherein the gate electrode layer includes a first region and a second region that have different widths, wherein the first region is located over the second region, and wherein the first region has a width larger than that of the second region.
地址 Atsugi-shi JP