| 发明名称 |
SEMICONDUCTOR PACKAGE INCLUDING EXPOSED CONNECTING STUBS |
| 摘要 |
A semiconductor package includes a substrate comprising a chip area and a peripheral area, at least one semiconductor chip mounted on the chip area, a plurality of stubs respectively on a plurality of pads arranged in the peripheral area, and a molding unit configured to cover at least a partial area of the at least one semiconductor chip and at least a partial area of the plurality of stubs on the substrate while exposing an upper surface of at least one of the plurality of stubs to outside of the molding unit, wherein at least a partial area of the upper surface of at least one of the plurality of stubs is substantially flat. |
| 申请公布号 |
US2016218091(A1) |
申请公布日期 |
2016.07.28 |
| 申请号 |
US201615001872 |
申请日期 |
2016.01.20 |
| 申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Du Maohua |
| 分类号 |
H01L25/10;H01L23/498 |
主分类号 |
H01L25/10 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A semiconductor package comprising:
a substrate including a chip area and a peripheral area; at least one semiconductor chip on the chip area; a plurality of stubs respectively on a plurality of pads in the peripheral area; and a molding unit configured to cover at least a partial area of the at least one semiconductor chip and at least a partial area of the plurality of stubs on the substrate, the molding unit exposing an upper surface of at least one of the plurality of stubs to an outside of the molding unit, wherein at least a partial area of the upper surface of at least one of the plurality of stubs is substantially flat. |
| 地址 |
Suwon-si KR |
