发明名称 |
Reduced VSWR Switching |
摘要 |
Sequenced switching mitigates impedance variations and signal reflections during switching events by stepping a switch incrementally through a sequence of different states from a start state to at least one intermediate state to an end state. Various architectures, sequencing and step control techniques may permit any degree of mitigation, including to the point of essentially eliminating impedance glitches. Sequential reconfiguration of the structure and/or parameters of one or more switch branches may permit simplification of related programming and circuitry while increasing the lifespan of components spared from unmitigated current and voltage spikes. Each switch branch being transitioned during a switch event may sequence differently than other branches based on the start state, end state and configuration of each branch. |
申请公布号 |
US2016285447(A1) |
申请公布日期 |
2016.09.29 |
申请号 |
US201514671785 |
申请日期 |
2015.03.27 |
申请人 |
Krishnamurthi Kathiravan;Mourant Jean-Marc;Hubert Olivier;Bawell Shawn |
发明人 |
Krishnamurthi Kathiravan;Mourant Jean-Marc;Hubert Olivier;Bawell Shawn |
分类号 |
H03K17/16 |
主分类号 |
H03K17/16 |
代理机构 |
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代理人 |
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主权项 |
1. A device comprising:
a switch configured to mitigate variation in switch impedance during a switch transition from a start state to an end state by stepping the switch through a sequence of different states from the start state to at least one intermediate state to the end state. |
地址 |
Westford MA US |