Implementation of AES encryption circuitry with CCM

摘要

The invention concerns Circuitry for encrypting at least a part of an input data (Bi) flow and generating a tag based on said input data flow with a same ciphering algorithm and a same key (K), said algorithm comprising iterative computations by at least two operation units, said circuitry comprising a pipeline comprising: an input selection unit (612) arranged to receive first data values to generate encryption sequences with said ciphering algorithm, second data values to generate temporary tags with said ciphering algorithm and an output of the pipeline; a first stage (627) arranged to receive an output of said input selection unit and comprising at least a first operation unit (632); and a second stage (635) arranged to receive an output of the first stage, comprising at least a second operation unit (648) and providing said output of the pipeline.