SALICIDED STRUCTURE TO INTEGRATE A FLASH MEMORY DEVICE WITH A HIGH K, METAL GATE LOGIC DEVICE

摘要

An integrated circuit for an embedded flash memory device is provided. A semiconductor substrate includes a memory region and a logic region adjacent to the memory region. A logic device is arranged over the logic region and includes a metal gate separated from the semiconductor substrate by a material having a dielectric constant exceeding 3.9. A flash memory cell device is arranged over the memory region. The flash memory cell device includes a first memory cell gate, a second memory cell gate, and a dielectric region arranged between neighboring sidewalls of the first and second memory cell gates. A silicide contact pad is arranged over a top surface of the first memory cell gate. The silicide contact pad is recessed relative to top surfaces of the dielectric region, the second memory cell gate and the metal gate. A method of manufacturing the integrated circuit is also provided.

主权项

1. An integrated circuit (IC) comprising:
a memory cell device arranged over a semiconductor substrate, wherein the memory cell device includes a first memory cell gate, a second memory cell gate, and a dielectric region arranged between neighboring sidewalls of the first and second memory cell gates, and wherein a top surface of the first memory cell gate is recessed below a top surface of the second memory cell gate; and a silicide contact pad arranged on the first memory cell gate, wherein the silicide contact pad is recessed relative to substantially coplanar top surfaces of the dielectric region and the second memory cell gate.