High Voltage ESD Protection Apparatus

摘要

A device comprises a high voltage n well and a high voltage p well over a buried layer, a first low voltage n well over the high voltage n well, wherein a bottom portion of the first low voltage n well is surrounded by the high voltage n well, an N+ region over the first low voltage n well, a second low voltage n well and a low voltage p well over the high voltage p well, a first P+ region over the second low voltage n well and a second P+ region over the low voltage p well.

主权项

1. An apparatus comprising:
an NPN transistor having
a collector formed by a N+ region, a first low voltage n well and a high voltage n well;a base formed by a first P+ region, a low voltage p well with a first doping density and a high voltage p well with a second doping density; andan emitter formed by a second low voltage n well; and a diode formed by a P+ region and the second low voltage n well, wherein:
the P+ region extends from a first isolation region to a second isolation region;the P+ region is formed on the second low voltage n well; anda top surface of the P+ region is level with a top surface of the N+ region.