发明名称 Intergrated OTP Memory for Providing MTP Memory
摘要 An integrated One-Time Programmable (OTP) memory to emulate an Multiple-Time Programmable (MTP) memory with a built-in program count tracking and block address mapping is disclosed. The integrated OTP memory has at least one non-volatile block register and count register to respectively store block sizes and program counts for different block/count configurations. The count register can be programmed before each round of programming occurs to indicate a new block for access. The integrated OTP memory also can generate a block address based on values from the count and block registers. By combining the block address with the lower bits of an input address, a final address can be generated and used to access different blocks (associated with different program counts) in the OTP memory to mimic an MTP memory.
申请公布号 US2016276043(A1) 申请公布日期 2016.09.22
申请号 US201615076460 申请日期 2016.03.21
申请人 Chung Shine C. 发明人 Chung Shine C.
分类号 G11C17/16;G11C17/18 主分类号 G11C17/16
代理机构 代理人
主权项 1. A pseudo-MTP memory that uses at least a portion of One-Time Programmable (OTP) memory to function as a Multiple-Time Programmable (MTP) memory, comprising: at least one OTP memory array having a plurality of OTP blocks; at least one block register configured to provide non-volatile storage for a block size; and at least one count register configured to store a program count; wherein the count register is programmed at least once each time starting a new programming a different one the of the OTP blocks in the OTP memory array, and wherein a final address to access the different blocks of the OTP memory array is generated based on the at least one count register, the at least one block register, and an input address.
地址 San Jose CA US