发明名称 REDUCED CORE COUNT SYSTEM CONFIGURATION
摘要 One example provides a method for configuring a system. The method includes determining an optimum processor clock frequency and an optimum core voltage for each of a plurality of reduced core count configurations for a system configurable to use up to a set number of cores. The method includes selecting a reduced core count configuration from the plurality of reduced core count configurations for an application based on a performance and a cost of each reduced core count configuration while executing the application.
申请公布号 WO2016114771(A1) 申请公布日期 2016.07.21
申请号 WO2015US11358 申请日期 2015.01.14
申请人 HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP 发明人 CALHOUN, MICHAEL B.
分类号 G06F9/38 主分类号 G06F9/38
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