| 发明名称 |
SEMICONDUCTOR MEMORY WITH DATA LINE CAPACITIVE COUPLING |
| 摘要 |
A method of accessing a semiconductor memory includes operations as follows. A first voltage is received at a first data line, and a second voltage is received at a second data line, during a write operation of the semiconductor memory, in which the first voltage is lower than the second voltage, and a first coupling line is capacitively coupled with the first data line to lower the first voltage at the first data line in the write operation of the semiconductor memory. |
| 申请公布号 |
US2016196871(A1) |
申请公布日期 |
2016.07.07 |
| 申请号 |
US201615066914 |
申请日期 |
2016.03.10 |
| 申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
LIAW Jhon-Jhy |
| 分类号 |
G11C11/419 |
主分类号 |
G11C11/419 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method of accessing a semiconductor memory, comprising:
receiving a first voltage at a first data line, and receiving a second voltage at a second data line, during a write operation of the semiconductor memory, wherein the first voltage is lower than the second voltage; and capacitively coupling a first coupling line with the first data line to lower the first voltage at the first data line in the write operation of the semiconductor memory. |
| 地址 |
HSINCHU TW |
