Memory Systems and Methods Involving High Speed Local Address Circuitry

摘要

Systems and methods of memory and memory operation are disclosed, such as providing a circuit including a local address driver voltage source for memory decoding. In one exemplary implementation, an illustrative circuit may comprise a first buffer and a capacitor. The first buffer may comprise a power input and a ground input. The capacitor may comprise a first terminal connected to the power input of the first buffer and a second terminal connected to the ground input of the first buffer. When the first buffer draws a current from the power input, at least a portion of the current may be supplied by the capacitor.

主权项

1. A memory circuit comprising:
a plurality of memory banks; a pre-decoder configured to receive data from and send data to circuitry external to the memory circuit; a data line coupled to the pre-decoder; and a plurality of memory address circuits, each of the memory address circuits being coupled to the data line and to at least one of the memory banks; each memory address circuit comprising:
a first buffer comprising a power input and a ground input; anda capacitor comprising a first terminal connected to the power input of the first buffer and a second terminal connected to the ground input of the first buffer so that when the first buffer draws a current from the power input, at least a portion of the current is supplied by the capacitor.