PARALLEL DIRECTION DECODE CIRCUITS FOR NETWORK-ON-CHIP

摘要

A first packet and a first direction associated with the first packet are received. The first packet is forwarded to an output port of a plurality of output ports of the first router based on the first direction associated with the first packet. A second direction associated with the first packet is determined. The second direction is based at least on an address of the first packet. The first packet and the second direction are forwarded through the output port of the first router to a second router.

主权项

1. A processor to comprise:
a first router to comprise:
a plurality of input ports to receive packets;a plurality of output ports to forward packets, an output port to comprise:
priority logic to select a packet from multiple packets to forward; anddirection logic to determine, for a packet of the multiple packets, a direction associated with the packet, wherein the direction logic is to be performed, at least in part, in parallel with the priority logic.