发明名称 記憶素子
摘要 A memory device with low power consumption and a signal processing circuit including the memory device are provided. In a memory element including a phase-inversion element by which the phase of an input signal is inverted and the signal is output such as an inverter or a clocked inverter, a capacitor which holds data, and a switching element which controls storing and releasing of electric charge in the capacitor are provided. For example, one of electrodes of the capacitor is connected to an input terminal or an output terminal of the phase-inversion element, and the other electrode is connected to a switching element. The above memory element is used for a memory device such as a register or a cache memory in a signal processing circuit.
申请公布号 JP5952077(B2) 申请公布日期 2016.07.13
申请号 JP20120108077 申请日期 2012.05.10
申请人 株式会社半導体エネルギー研究所 发明人 竹村 保彦
分类号 H01L21/8244;H01L21/8242;H01L27/108;H01L27/11 主分类号 H01L21/8244
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