发明名称 High linearity low noise amplifier
摘要 A two-stage RF amplifier comprising first and second transistors arranged in cascode. An input stage includes a common source transistor having a gate terminal responsive to an input signal and an output stage includes a common gate transistor having a source terminal operatively connected to the drain terminal of the common source transistor. A shunt feedback network is arranged between a drain terminal of the common gate transistor and the gate terminal of the common source transistor. A source feedback network is arranged between the source terminal of the common source transistor and a reference potential. A common gate feedback network is arranged between the drain terminal of the common gate transistor and a gate terminal of the common gate transistor. And a termination feedback network is arranged in series between the reference potential and the gate terminal of the common gate transistor.
申请公布号 US9219450(B1) 申请公布日期 2015.12.22
申请号 US201414149306 申请日期 2014.01.07
申请人 Lockheed Martin Corporation 发明人 Helms David R.;Fox, Jr. Peter W.;Higgins Thomas P.;Trueheart, Jr. William G.
分类号 H03F3/21;H03F3/193;H03F1/22 主分类号 H03F3/21
代理机构 Howard IP Law Group, PC 代理人 Howard IP Law Group, PC
主权项 1. A cascode amplifier comprising: an input stage including a common source transistor having a gate terminal responsive to an input signal; an output stage including a common gate transistor having a source terminal operatively connected to the drain terminal of the common source transistor; a shunt feedback network arranged between a drain terminal of the common gate transistor and the gate terminal of the common source transistor; a source feedback network arranged between the source terminal of the common source transistor and a reference potential; a common gate feedback network comprising at least one capacitor and at least one resistor arranged in series between the drain terminal of the common gate transistor and a gate terminal of the common gate transistor; and a termination feedback network arranged in series between the reference potential and the gate terminal of the common gate transistor.
地址 Bethesda MD US