| 摘要 |
PROBLEM TO BE SOLVED: To provide a high-integration SOI CMOS composed of vertical MISFETs.SOLUTION: An SOI CMOS composed of vertical (vertical-direction operation) N-channel and P-channel MISFETs with a layer structure which includes: a three-tier columnar structure semiconductor layers (5, 7, 8) which is provided on a semiconductor substrate 1 via an insulation film 2, and in which a part of a conductive film 6 is embedded; ptype source/drain regions (11, 12) which are provided throughout the first semiconductor layer 5 and in a lower part of the second semiconductor layer 7 and in an upper part of the second semiconductor layer 7 below the conductive film 6, and n type and ntype source/drain regions (13-16) which are provided on an upper part of the second semiconductor layer 7 above the conductive film 6 and in a lower part of the third semiconductor layer 8 and in an upper part of the third semiconductor layers 8, in which the ptype drain region 12 and the ntype drain regions 13 are connected by the conductive film 6; and an integrated surrounding gate electrode 10 which is provided on lateral faces of the second and third semiconductor layers (7, 8) via a gate insulation film 9.SELECTED DRAWING: Figure 2 |
