| 发明名称 |
PARTIAL SPACER FOR INCREASING SELF ALIGNED CONTACT PROCESS MARGINS |
| 摘要 |
A semiconductor structure is provided. The semiconductor includes a gate stack on a substrate. The semiconductor includes a first set of sidewall spacers on opposite sidewalls of the gate stack. The semiconductor includes a flowable dielectric layer on the substrate, covering at least a portion of the first set of sidewall spacers. The semiconductor includes a second set of sidewall spacers next to the first set of sidewall spacers covering an upper portion thereof, the second set of sidewall spacers are directly on top of the flowable dielectric layer. The semiconductor includes a contact next to at least one of the second set of sidewall spacers. |
| 申请公布号 |
US2016181392(A1) |
申请公布日期 |
2016.06.23 |
| 申请号 |
US201414576436 |
申请日期 |
2014.12.19 |
| 申请人 |
International Business Machines Corporation |
发明人 |
Alptekin Emre;Ramachandran Ravikumar;Sardesai Viraj Y.;Vega Reinaldo A. |
| 分类号 |
H01L29/66;H01L21/28;H01L21/283;H01L29/417 |
主分类号 |
H01L29/66 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A semiconductor structure comprising:
a gate stack on a substrate; a first set of sidewall spacers on opposite sidewalls of the gate stack; a flowable dielectric layer on the substrate, covering at least a portion of the first set of sidewall spacers; a second set of sidewall spacers next to the first set of sidewall spacers covering an upper portion thereof, the second set of sidewall spacers are directly on top of the flowable dielectric layer; and a contact next to at least one of the second set of sidewall spacers. |
| 地址 |
Armonk NY US |
