发明名称 ABNORMALITY DETECTING CIRCUIT AND ABNORMALITY DETECTING METHOD
摘要 There is provided an abnormality detecting circuit. A clamp unit is configured to clamp an output voltage which is output from another device, such that the upper limit of the output voltage becomes a first clamp voltage which is generated on the basis of a constant voltage generated from a power supply voltage, or a second clamp voltage which is generated on the basis of the power supply voltage and which varies depending on the power supply voltage. A short-to-power detection unit is configured to compare the output voltage clamped by the clamp unit, with a predetermined threshold value which is generated on the basis of the power supply voltage, thereby detecting occurrence of a short to power.
申请公布号 US2016377666(A1) 申请公布日期 2016.12.29
申请号 US201615158168 申请日期 2016.05.18
申请人 FUJITSU TEN LIMITED 发明人 KUME Masayoshi;KIDO Keisuke
分类号 G01R31/02;G01R31/40;H03K5/08 主分类号 G01R31/02
代理机构 代理人
主权项 1. An abnormality detecting circuit comprising: a clamp unit configured to clamp an output voltage which is output from another device, such that the upper limit of the output voltage becomes a first clamp voltage which is generated on the basis of a constant voltage generated from a power supply voltage, or a second clamp voltage which is generated on the basis of the power supply voltage and which varies depending on the power supply voltage; and a short-to-power detection unit configured to compare the output voltage clamped by the clamp unit, with a predetermined threshold value which is generated on the basis of the power supply voltage, thereby detecting occurrence of a short to power.
地址 Kobe-shi JP