| 摘要 |
PROBLEM TO BE SOLVED: To shorten the time from the determination of a reduction rate to the start of subsequent processing when performing image reduction processing by means of a hardware processing circuit.SOLUTION: In an image processing apparatus 11, N steps of image reduction processing with the reduction rate of 50% are performed by one or more ASICs each for performing image reduction with the reduction rate of 50% in a sub scanning direction. One of the ASICs performs an (i)th (N-1≥i≥1) step of image reduction processing with the reduction rate of 50% and image data obtained by the image reduction processing are stored in a buffer memory of which the size is equal to 1/2of one band. One of the ASICs performs an (i+1)th step of image reduction processing with the reduction rate of 50% immediately after the image data obtained by the (i)th step of image reduction processing are stored in the buffer memory, and image data obtained by the image reduction processing are stored in a buffer memory of which the size is equal to 1/2of one band. |
