| 摘要 |
<p>An integrated power semiconductor device has an isolation structure having two or more isolation trenches (T1, T2...,), and one or more regions (202, 204) in between the isolation trenches, and a bias arrangement (V1, V2...,R1, R2...) coupled to the regions to divide a voltage across the isolation structure between the isolation trenches. By dividing the voltage, the reverse breakdown voltage characteristics such as voltage level, reliability and stability can be improved for a given area of device, or for a given complexity of device, and avalanche breakdown at weaknesses in isolation structures can be reduced or avoided.</p> |
