MEMORY DEVICE, RELATED METHOD, AND RELATED ELECTRONIC DEVICE

摘要

A memory device may include the following elements: a first memory cell; a first word line for transmitting a first control signal to control an electrical connection in the first memory cell; a first bit line connected to the first memory cell; a first transistor, wherein a first terminal of the first transistor is connected to the first bit line; a second memory cell; a second word line for transmitting a second control signal to control an electrical connection in the second memory cell; a second bit line connected to the second memory cell; a second transistor, wherein a first terminal of the second transistor is connected to the second bit line; and a sense amplifier having a first input terminal connected to a second terminal of the first transistor and having a second input terminal connected to a second terminal of the second transistor.

主权项

1. A memory device comprising:
a first plurality of memory cells, which includes a first memory cell; a first word line, which is electrically connected to each memory cell of the first plurality of memory cells and is configured to transmit a first control signal for controlling electrical connections in the first plurality of memory cells; a first bit line, which is electrically connected to the first memory cell; a first transistor, wherein a first terminal of the first transistor is electrically connected to the first bit line; a second plurality of memory cells, which includes a second memory cell; a second word line, which is electrically connected to each memory cell of the second plurality of memory cells and is configured to transmit a second control signal for controlling electrical connections in the second plurality of memory cells; a second bit line, which is electrically connected to the second memory cell; a second transistor, wherein a first terminal of the second transistor is electrically connected to the second bit line; and a sense amplifier, wherein a first input terminal of the sense amplifier is electrically connected to a second terminal of the first transistor, and wherein a second input terminal of the sense amplifier is electrically connected to a second terminal of the second transistor.