PHASE LOCKED LOOP CIRCUIT AND METHOD OF FREQUENCY ADJUSTMENT OF INJECTION LOCKED FREQUENCY DIVIDER

摘要

In a PLL circuit, first an ILFD is connected to an output voltage Vtune from an LPF, thereby causing the ILFD to operate as an oscillator. The ILFD, a DIV, PFD, CP, and LPF form a PLL and thereby locking operations are initiated. When a predetermined time elapses, an output frequency from the ILFD converges into a certain value and the PLL is subjected to a locked state. After the locked state is reached, a sample hold circuit SH holds the output voltage Vtune from the loop filter as of that time and frequency adjustment of the ILFD is completed. Similar frequency adjustment is sequentially performed on other ILFDs.

主权项

1. A phase locked loop circuit, comprising:
an oscillator to output an oscillation signal having a frequency; a first injection locked frequency divider to be input with the oscillation signal having the frequency output from the oscillator; a filter to output a voltage to the oscillator; and a supply unit, comprising: an output voltage supply unit to fetch the output voltage output from the filter to the oscillator and to supply or block the fetched output voltage to the injection locked frequency divider; and a hold voltage supply unit to hold the output voltage from the filter and to supply the held output voltage to the injection locked frequency divider when the output voltage supply unit blocks the output voltage.