发明名称 |
MULTILAYER WIRING BOARD MANUFACTURING METHOD |
摘要 |
A multilayer wiring board manufacturing method comprising: a step (1) of providing a through-hole opening penetrating through metal foil on both side of an insulating layer and through the insulating layer, a metal foil projection on both sides of the insulating layer formed at opening portions for the through-hole opening, and a lower space formed between the metal foil projection and an inner wall of the through-hole opening; and a step (2) of filling the through-hole opening by forming an electrolytic filled plated layer in the through-hole opening and on the metal foil on both sides of the insulating layer, wherein the filling of the through-hole opening by the formation of the electrolytic filled plated layer in the step (2) is performed such that the current density for electrolytic filled plating is decreased in the course of the electrolytic filled plating and then increased. |
申请公布号 |
WO2016163049(A1) |
申请公布日期 |
2016.10.13 |
申请号 |
WO2015JP82926 |
申请日期 |
2015.11.24 |
申请人 |
HITACHI CHEMICAL COMPANY, LTD. |
发明人 |
YOSHIDA Nobuyuki |
分类号 |
H05K3/40;C25D7/00;C25D21/12;H05K3/46 |
主分类号 |
H05K3/40 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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