发明名称 METHOD OF MANAGING INSTRUCTION CACHE AND PROCESSOR USING THE METHOD
摘要 A method of managing an instruction cache and a processor using the same are provided to solve cache miss to be generated without using a prediction algorithm. A processor core(110) has the first active mode and the second active mode. An instruction cache(120) detects cache miss during the second active mode by tracing the first instruction that the processor core performs during the first active mode. The instruction cache produces a fake program counter. The instruction cache traces the first instruction in advance by changing a value of the fake program counter. If the cache miss about the first instruction is detected, the instruction cache receives the first instruction from an external memory(150). The instruction cache stores the first instruction received from the external memory.
申请公布号 KR20090027879(A) 申请公布日期 2009.03.18
申请号 KR20070093045 申请日期 2007.09.13
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 PARK, IL HYUN;YOO, DONG HOON;SUH, DONG KWAN;RYU, SOO JUNG;KIM, JEONG WOOK
分类号 G06F9/32;G06F9/26;G06F9/28 主分类号 G06F9/32
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