| 发明名称 |
EARLY IDENTIFICATION IN TRANSACTIONAL BUFFERED MEMORY |
| 摘要 |
A sequence of read returns are to be sent to a host device over a transactional buffered memory interface, where the sequence includes at least a first read return to a first read request and a second read return to a second read request. A tracker identifier of the second read return is encoded in the first read return and the first read return is sent with the tracker identifier of the second read return to the host device. The second read return is sent to the host device after the first read return is sent. |
| 申请公布号 |
US2016179718(A1) |
申请公布日期 |
2016.06.23 |
| 申请号 |
US201414578407 |
申请日期 |
2014.12.20 |
| 申请人 |
Intel Corporation |
发明人 |
Morris Brian S.;Nale Bill;Blankenship Robert G.;Swanson Jeffrey C. |
| 分类号 |
G06F13/28;G06F13/42 |
主分类号 |
G06F13/28 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An apparatus comprising:
a memory buffer device to:
identify a sequence of read returns to be sent to a host device over an interface, wherein the interface is to comprise a transactional buffered memory interface, and the sequence is to comprise at least a first read return to a first read request and a second read return to a second read request;encode a tracker identifier of the second read return in the first read return;send the first read return with the tracker identifier of the second read return to the host device; andsend the second read return to the host device after the first read return is sent. |
| 地址 |
Santa Clara CA US |
