发明名称 SCALABLE EVENT HANDLING IN MULTI-THREADED PROCESSOR CORES
摘要 In one embodiment, a processor includes a frontend unit having an instruction decoder to receive and to decode instructions of a plurality of threads, an execution unit coupled to the instruction decoder to receive and execute the decoded instructions, and an instruction retirement unit having a retirement logic to receive the instructions from the execution unit and to retire the instructions associated with one or more of the threads that have an instruction or an event pending to be retired. The instruction retirement unit includes a thread arbitration logic to select one of the threads at a time and to dispatch the selected thread to the retirement logic for retirement processing.
申请公布号 US2016179533(A1) 申请公布日期 2016.06.23
申请号 US201414581285 申请日期 2014.12.23
申请人 Gramunt Roger;Padmanabhan Rammohan;Matas Ramon;Moyer Neal S.;Chaffin Benjamin C.;Sodani Avinash;Suprun Alexey P.;Sundaram Vikram S.;Chan Chung-Lun;Fernandez Gerardo A.;Gago Julio;Yang Michael S.;Kesiraju Aditya 发明人 Gramunt Roger;Padmanabhan Rammohan;Matas Ramon;Moyer Neal S.;Chaffin Benjamin C.;Sodani Avinash;Suprun Alexey P.;Sundaram Vikram S.;Chan Chung-Lun;Fernandez Gerardo A.;Gago Julio;Yang Michael S.;Kesiraju Aditya
分类号 G06F9/30;G11C7/10;G06F12/12;G06F9/38;G06F9/48 主分类号 G06F9/30
代理机构 代理人
主权项 1. A processor, comprising: a frontend unit having an instruction decoder to receive and to decode instructions of a plurality of threads; an execution unit coupled to the instruction decoder to receive and execute the decoded instructions; and an instruction retirement unit having a retirement logic to receive the instructions from the execution unit and to retire the instructions associated with one or more of the threads that have an instruction or an event pending to be retired, the instruction retirement unit including a thread arbitration logic to select one of the threads at a time and to dispatch the selected thread to the retirement logic for retirement processing.
地址 Portland OR US