发明名称 NANOTUBE SEMICONDUCTOR DEVICES
摘要 Semiconductor devices includes a thin epitaxial layer (nanotube) formed on sidewalls of mesas formed in a semiconductor layer. In one embodiment, a semiconductor device includes a first epitaxial layer and a second epitaxial layer formed on mesas of the semiconductor layer. The thicknesses and doping concentrations of the first and second epitaxial layers and the mesa are selected to achieve charge balance in operation. In another embodiment, the semiconductor body is lightly doped and the thicknesses and doping concentrations of the first and second epitaxial layers are selected to achieve charge balance in operation.
申请公布号 US2016300909(A1) 申请公布日期 2016.10.13
申请号 US201615097162 申请日期 2016.04.12
申请人 Alpha and Omega Semiconductor Incorporated 发明人 Yilmaz Hamza;Wang Xiaobin;Bhalla Anup;Chen John;Chang Hong
分类号 H01L29/08;H01L29/78;H01L29/872;H01L29/40;H01L29/06;H01L27/06;H01L29/10;H01L21/265;H01L29/739;H01L29/861 主分类号 H01L29/08
代理机构 代理人
主权项 1. A semiconductor device comprising: a lightly doped semiconductor layer formed on a heavily doped semiconductor layer, the lightly doped semiconductor layer comprising a first trench and a second trench formed therein, the first and second trenches extending close to, up to, or into the heavily doped semiconductor layer, the first and second trenches forming a mesa in the lightly doped semiconductor layer; a first epitaxial layer of a first conductivity type formed on sidewalls of the first and second trenches, adjacent the mesa; a second epitaxial layer of a second conductivity type opposite the first conductivity type formed on the first epitaxial layer; a first dielectric layer formed in the first and second trenches, adjacent the second epitaxial layer, the first dielectric layer filling at least part of the trenches; a gate dielectric layer formed on the sidewalls of the first and second trenches above the first dielectric layer; and a gate conductive layer formed in the first and second trenches above the first dielectric layer and adjacent the gate dielectric layer, wherein the first epitaxial layer and the second epitaxial layer form adjacent doped regions along the sidewalls of the first and second trenches, wherein charges in a region of the mesa between the doped regions along the sidewalls of the first and second trenches and charges in the doped regions along the sidewalls of the first and second trenches achieve charge balance in operation.
地址 Sunnyvale CA US