| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a frequency synthesizer which has a low jitter component and whose power consumption is minimized. <P>SOLUTION: The frequency synthesizer includes a phase comparator for detecting a difference between a frequency and a phase with a reference signal and a comparison signal input thereto to generate an up-signal and a down-signal, a charge pumping circuit using the up-signal and the down-signal for charging or discharging voltage to output a control signal, a voltage controlled oscillator using the control signal output from the pumping circuit to output a signal having the frequency with an oscillation output signal, a duty cycle correction circuit connected to the voltage controlled oscillator for correcting a duty cycle, and a feedback divider for dividing the frequency of the oscillation output signal to provide the comparison signal for the phase comparator. <P>COPYRIGHT: (C)2009,JPO&INPIT |
