Integrated circuit packaging system with coreless substrate and method of manufacture thereof

摘要

An integrated circuit packaging system and method of manufacture thereof includes: discrete components coupled to a top trace; vias attached to the top trace separated from the discrete components; a dielectric layer on the top trace, the discrete components, and the vias, includes a component surface formed above the discrete components, with the top trace coplanar with the dielectric layer; and system interconnects coupled to the vias for electrically connecting the top trace, the discrete components, or a combination thereof to the system interconnects.

主权项

1. A method of manufacture of an integrated circuit packaging system comprising:
depositing a top trace on a manufacturing carrier; attaching discrete components on the top trace opposite the manufacturing carrier; mounting vias on the top trace separated from the discrete components; forming a dielectric layer on the top trace, the discrete components, and the vias, including forming a component surface having the dielectric layer coplanar with the top trace; mounting a stacked integrated circuit over the component surface and directly above the discrete components positioned under the component surface; forming a solder mask covering a system surface of the dielectric layer opposite to the component surface, the solder mask includes a coupling port below each of the vias; and mounting system interconnects below the solder mask and coupled to the vias for electrically connecting the top trace, the discrete components, or a combination thereof to the system interconnects.