发明名称 |
Clock generating circuit and clock generating method |
摘要 |
<p>The invention provides a clock generating circuit for generating a spectrum spread clock and carrying out highspeed and accurate phase control of a reference clock signal and an output clock signal, which is composed of compact circuits, and a method for generating the clock. The spectrum spread clock generating circuit (1) is provided with a phase comparator unit (10) that compares the reference clock signal (CLKS) with the internal clock signal in terms of a phase difference, and outputs a control current (ICI) in compliance with the result of comparison; a clock generating unit (20) for generating an output clock signal (CLKO); a phase difference signal modulating unit (30) for outputting a control current (IC3); and a delay unit (40) for delaying the output clock in compliance with the control current (IC3) and outputting the internal clock signal (CLKN).</p> |
申请公布号 |
EP1748562(A1) |
申请公布日期 |
2007.01.31 |
申请号 |
EP20050256766 |
申请日期 |
2005.11.01 |
申请人 |
FUJITSU LIMITED |
发明人 |
YAMAMOTO, SHINICHI;OKADA, KOJI;TANAKA, MASAHIRO |
分类号 |
H03L7/081;H03C3/00;H03K5/13;H03L7/18 |
主分类号 |
H03L7/081 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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