STRUCTURE OF SEMICONDUCTOR DEVICE PACKAGE AND THE METHOD OF THE SAME

摘要

A semiconductor device package structure and a method for manufacturing the same are provided to improve a CTE(Coefficient of Thermal Expansion) property, to reduce a size, and to implement a reliability test of a board level temperature cycling. A substrate(102) has a die receiving cavity(105) and terminal contact point pads(112). A first die(104) is arranged in the die receiving cavity. A first dielectric(110) is formed on the first die and the substrate. The first dielectric is re-filled in a gap between the die and the substrate to absorb thermal and mechanical stress. A first RDL(Re-Distribution Layer)(114) is formed on the first dielectric and coupled to the first die. A second dielectric(116) is formed on the first RDL A second die(120) is arranged on the second dielectric and enclosed by core pastes(124) formed on through holes(126). A second RDL(128) is formed on the core pastes to gap-fill the through holes. A third dielectric(130) is formed on the second RDL. The first and second dies have plural pads(108) coupled to the first and second RDLs by the through holes.