发明名称 INPUT PROTECTIVE CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an input protection circuit capable of clamping voltage below a power supply voltage, even when a voltage exceeding the operating power supply voltage of a circuit is impressed to an external input terminal. SOLUTION: An FET 7 converts the voltage impressed to the external input terminal 3 to a currentΔI1. An FET 6 generates a currentΔI2, having a prescribed mirror ratio to the converted current. Voltage, dropped by the amount equivalent to the terminal voltage of a resistive element 10 made lower than the operating power supply voltage VDD of an ECU 1, is impressed to the input terminal of an inverter gate 11 by the flow of the currentΔI2 into the resistive element 10. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006157578(A) 申请公布日期 2006.06.15
申请号 JP20040346224 申请日期 2004.11.30
申请人 DENSO CORP 发明人 INOUE AKIMITSU
分类号 H03K19/003;H01L21/822;H01L27/04;H03K19/0175 主分类号 H03K19/003
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