发明名称 |
VOLTAGE FLUCTUATION ESTIMATING METHOD AND APPARATUS, SEMICONDUCTOR DEVICE OPERATION VERIFICATION APPARATUS, SEMICONDUCTOR DEVICE DESIGNING METHOD, PRINTED CIRCUIT BOARD DESIGNING METHOD, AND PROGRAM |
摘要 |
A computer determines a first relationship between a maximum frequency of the semiconductor device and an internal power supply voltage of the semiconductor device. Then, the computer determines a second relationship between the maximum frequency and an amount of noise, based on a number of the input/output signal pins. In addition, the computer estimates a fluctuation of the internal power supply voltage corresponding to a amount of noise of the semiconductor device, based on the first relationship and the second relationship. Then, the computer performs a design change of the semiconductor device based on the estimated fluctuation. And the computer stores the changed design of the semiconductor device to a storage device.
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申请公布号 |
US2010023909(A1) |
申请公布日期 |
2010.01.28 |
申请号 |
US20090505616 |
申请日期 |
2009.07.20 |
申请人 |
FUJITSU LIMITED |
发明人 |
KOUZAKI YASUO |
分类号 |
G06F17/50;H01L21/82;H01L21/822;H01L27/04 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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