发明名称 |
MICRO-TILE MEMORY INTERFACES |
摘要 |
In one embodiment of the invention, a memory integrated circuit is provided including an address decoder to selectively access memory cells within a memory array; a mode register with bit storage circuits to store an enable bit and at least one sub-channel select bit; and control logic. The control logic is coupled to a plurality of address signal lines, the address decoder, and the mode register. In response to the enable bit and the at least one sub-channel select bit, the control logic selects one or more of the address signal lines to capture independent address information to support independent sub-channel memory accesses into the memory array. The control logic couples the independent address information into the address decoder. |
申请公布号 |
WO2007005891(A3) |
申请公布日期 |
2007.05.03 |
申请号 |
WO2006US26072 |
申请日期 |
2006.06.30 |
申请人 |
INTEL CORPORATION;MACWILLIAMS, PETER;AKIYAMA, JAMES;GABEL, DOUGLAS |
发明人 |
MACWILLIAMS, PETER;AKIYAMA, JAMES;GABEL, DOUGLAS |
分类号 |
G06F13/16 |
主分类号 |
G06F13/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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