发明名称 SUBSTRATE WITH MULTILAYER PLATED THROUGH HOLE AND METHOD FOR FORMING THE MULTILAYER PLATED THROUGH HOLE
摘要 A structure with a multilayer plated through hole is disclosed. At least one dielectric layer formed by deposition and a conductive layer are formed in an original plated through hole (PTH). The dielectric layer partially covers wiring layers of the substrate to electrically isolate the PTH and the conductive layer to form a multilayer PTH so as to save PTH occupation space of the substrate. Preferably, the formation of the dielectric layer is electrophoretic deposition to control the deposition thickness in the PTH very even and thin, no drilling is necessary. Accordingly, it can increase electrical performance and decrease cross-talk effect.
申请公布号 US2007199736(A1) 申请公布日期 2007.08.30
申请号 US20070620031 申请日期 2007.01.04
申请人 ADVANCED SEMICONDUCTOR ENGINEERING, INC. 发明人 WANG CHIEN HAO
分类号 H05K1/11;H01R12/04 主分类号 H05K1/11
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