发明名称 |
GENERATEUR ET PROCEDE DE GENERATION DE SIGNAL D'HORLOGE |
摘要 |
The generator (250) has a control circuit for counting cycles of a clock signal during each period between two sequentially input synchronization signals. The control circuit generates a frequency control signal based on a count value. The generator generates the clock signal having a frequency corresponding to the frequency control signal. The control circuit blocks the frequency control signal, when the count value in a predetermined range. Independent claims are also included for the following: (1) a method for generating a clock signal (2) a circuit comprising a transceiver. |
申请公布号 |
FR2906377(B1) |
申请公布日期 |
2016.12.09 |
申请号 |
FR20070056490 |
申请日期 |
2007.07.13 |
申请人 |
SAMSUNG ELECTRONICS CO LTD |
发明人 |
SUNG HYUK JUN;KIM CHAN YONG;CHO JONG PIL |
分类号 |
G06F1/04 |
主分类号 |
G06F1/04 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|