发明名称 METHOD AND CIRCUIT FOR REPRODUCTIVE CLOCK DATA
摘要 <P>PROBLEM TO BE SOLVED: To conduct a normal discriminating operation even when the duty of input data is displaced largely from 100%. <P>SOLUTION: In a method for reproducing a clock data, a reproductive clock synchronizing with the edge timing of the input data is generated, and the input data is discriminated by the reproductive clock. In the method for reproducing the clock data, a correction data correcting the duty of the input data in response to the level of a correction signal is obtained, and the duty of the correction data is detected by the reproductive clock and the correction signal is generated. The generation of the reproductive clock and the discrimination of the data are conducted on the basis of the correction data. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008227786(A) 申请公布日期 2008.09.25
申请号 JP20070061298 申请日期 2007.03.12
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 OTOMO YUSUKE;TERADA JUN;KISHINE YOSHIMICHI;NISHIMURA KAZUYOSHI
分类号 H04L7/02 主分类号 H04L7/02
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