发明名称 RESOURCE-SAVING CIRCUIT STRUCTURES FOR DEEPLY PIPELINED SYSTOLIC FINITE IMPULSE RESPONSE FILTERS
摘要 Circuitry that accepts a data input (420) and an enable input (425), and generates an output sum (424) based on the data input includes an input stage circuit that includes an input register (401). The input register (401) accepts the enable input (425). The circuitry further includes a systolic register (413) operatively connected to the input stage circuit, and the systolic register (413) is operated without any enable connection. The circuitry further includes a multiplier (406) connected to the systolic register, which is configured to generate a product value. The circuitry further includes an output stage circuit that includes an adder (416) that calculates the output sum based least in part on the product value.
申请公布号 EP3104524(A2) 申请公布日期 2016.12.14
申请号 EP20160169462 申请日期 2016.05.12
申请人 Altera Corporation 发明人 Langhammer, Martin;Finn, Simon Peter
分类号 H03H17/06 主分类号 H03H17/06
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