发明名称 |
Spread-spectrum clock generator |
摘要 |
A spread-spectrum clock (SSC) generator for generating an SSC signal. The SSC generator has a first up/down counter that operates for a fixed, first duration (t1), a first PRBS generator that operate for a variable, second duration (t2), a second up/down counter that operates for a fixed, third duration (t3), and a second PRBS generator that operates for a variable, fourth duration (t4). A state machine sequentially triggers the first counter and the first PRBS generator to generate a positive portion of a cycle of the SSC signal and then sequentially triggers the second counter and the second PRBS generator to generate a negative portion of the cycle of the SSC signal. For a set of parameters stored in configurable registers, the first and third durations are fixed from cycle to cycle, while the second and fourth durations vary from cycle to cycle. |
申请公布号 |
US9509295(B1) |
申请公布日期 |
2016.11.29 |
申请号 |
US201614992007 |
申请日期 |
2016.01.10 |
申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
Liu Meng;Feng Bin;Qiu Liang |
分类号 |
H03K5/135;H03K3/84 |
主分类号 |
H03K5/135 |
代理机构 |
|
代理人 |
Bergere Charles E. |
主权项 |
1. A spread-spectrum clock (SSC) generator for generating an SSC signal, the SSC generator comprising:
a first counter that operates for a first duration (t1) corresponding to a fixed part of a positive portion of an SSC cycle of the SSC signal; a first random generator that operates for a second duration (t2) corresponding to a variable part of the positive portion of the SSC cycle; a second counter that operates for a third duration (t3) corresponding to a fixed part of a negative portion of the SSC cycle; a second random generator that operates for a fourth duration (t4) corresponding to a variable part of the negative portion of the SSC cycle; a set of configurable registers that store parameters to control operations of the first and second counters and the first and second random generators; and a state machine that sequentially triggers the first and second counters and the first and second random generators in a specified order to generate the SSC cycle, wherein each counter is an up-down counter. |
地址 |
Austin TX US |