| 摘要 |
PROBLEM TO BE SOLVED: To provide a delay circuit appropriate for a Fin FET.SOLUTION: A semiconductor device 100 comprises a first inverter 110 and a second inverter 120 series connected with the first inverter. Each of the first and second inverters comprises a p-channel type transistor and an n-channel type transistor. The number of projection semiconductor layers which compose active regions of the p-channel type transistor 121p and an n-channel type transistor 121n of the second inverter is smaller than the number of projection semiconductor layers which compose active regions of the p-channel type transistor 111p and the n-channel type transistor 111n of the first inverter, respectively.SELECTED DRAWING: Figure 13 |
