Method Of Forming Self-Aligned Split-Gate Memory Cell Array With Metal Gates And Logic Devices

摘要

A method of forming a memory device by forming spaced apart first and second regions with a channel region therebetween, forming a floating gate over and insulated from a first portion of the channel region, forming a control gate over and insulated from the floating gate, forming an erase gate over and insulated from the first region, and forming a select gate over and insulated from a second portion of the channel region. Forming of the floating gate includes forming a first insulation layer on the substrate, forming a first conductive layer on the first insulation layer, and performing two separate etches to form first and second trenches through the first conductive layer. A sidewall of the first conductive layer at the first trench has a negative slope and a sidewall of the first conductive layer at the second trench is vertical.

主权项

1. A method of forming a memory device, comprising:
forming, in a substrate of a first conductivity type, spaced apart first and second regions of a second conductivity type, defining a channel region therebetween; forming a floating gate disposed over and insulated from a first portion of the channel region which is adjacent the first region; forming a control gate disposed over and insulated from the floating gate; forming an erase gate disposed over and insulated from the first region; forming a select gate over and insulated from a second portion of the channel region which is adjacent to the second region; wherein the forming of the floating gate includes:
forming a first insulation layer on the substrate,forming a first conductive layer on the first insulation layer,performing a first etch to form a first trench through the first conductive layer, andperforming a second etch different than the first etch to form a second trench through the first conductive layer,wherein the floating gate constitutes the first conductive layer between the first and second trenches,wherein the first region is disposed under the first trench,wherein a sidewall of the first conductive layer at the first trench has a negative slope, and wherein a sidewall of the first conductive layer at the second trench is vertical.