Vias in porous substrates

摘要

A microelectronic unit can include a substrate having front and rear surfaces and active semiconductor devices therein, the substrate having a plurality of openings arranged in a symmetric or asymmetric distribution across an area of the rear surface, first and second conductive vias connected to first and second pads exposed at the front surface, pluralities of first and second conductive interconnects extending within respective ones of the openings, and first and second conductive contacts exposed for interconnection with an external element. The plurality of first conductive interconnects can be separated from the plurality of second conductive interconnects by at least one of the plurality of openings, the at least one opening at least partially filled with an insulating material. The distribution of the openings can include at least m openings spaced apart in a first direction and n openings spaced apart in a second direction transverse to the first direction.

主权项

1. A method of fabricating a microelectronic unit, comprising:
forming a plurality of openings extending from a first surface of a semiconductor substrate towards a second surface remote therefrom, the openings arranged in a symmetric or asymmetric distribution across an area of the first surface, with at least m openings spaced apart in a first direction along the first surface and n openings spaced apart in a second direction along the first surface transverse to the first direction, each of m and n being greater than 1, the substrate embodying a plurality of active semiconductor devices, the substrate having a plurality of conductive pads exposed at the second surface; forming pluralities of first and second conductive interconnects extending within respective first and second subsets of the openings, the plurality of first conductive interconnects extending within at least two adjacent ones of the first subset of the openings spaced apart in the first direction and within at least two adjacent ones of the first subset of the openings spaced apart in the second direction, the plurality of second conductive interconnects extending within at least two adjacent ones of the second subset of the openings spaced apart in the first direction and within at least two of the second subset of the openings spaced apart in the second direction; forming first and second conductive vias electrically connected with respective first and second pads of the plurality of conductive pads, each first conductive interconnect being electrically connected to the first conductive via, each second conductive interconnect being electrically connected to the second conductive via; and depositing an insulating dielectric material at least partially filling at least one of the plurality of openings, wherein the plurality of first conductive interconnects is separated from the plurality of second conductive interconnects in a horizontal direction substantially parallel to the first surface by the at least one of the plurality of openings.