发明名称 |
Design Structures Incorporating Semiconductor Device Structures with Reduced Junction Capacitance and Drain Induced Barrier Lowering |
摘要 |
Design structure embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes semiconductor device structures characterized by reduced junction capacitance and drain induced barrier lowering. The semiconductor device structure of the design structure includes a semiconductor layer and a dielectric layer disposed between the semiconductor layer and the substrate. The dielectric layer includes a first dielectric region with a first dielectric constant and a second dielectric region with a second dielectric constant that is greater than the first dielectric constant.
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申请公布号 |
US2008034335(A1) |
申请公布日期 |
2008.02.07 |
申请号 |
US20070875013 |
申请日期 |
2007.10.19 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CHENG KANGGUO;HSU LOUIS L.;MANDELMAN JACK A.;YANG HAINING |
分类号 |
G11C29/54 |
主分类号 |
G11C29/54 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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